NAND-type flash memory (“NAND memory”) may be erased in blocks of memory. Developments in NAND lithography may have resulted in larger erase blocks that may be managed internally by the NAND memory in sub-blocks (e.g., 1/32 of a block). Under conventional solutions, however, a sub-block erase failure may cause the entire block to be treated as defective even though the NAND memory may be able to contain the failure to the sub-block in question. Accordingly, user exposable memory capacity may be wasted unnecessarily. Additionally, redundancy overhead (e.g., to protect against failure) may be relatively high due to the large size of the erase blocks.